Datasheet

Section 9 I/O Ports
Rev.4.00 Nov. 02, 2005 Page 102 of 304
REJ09B0143-0400
P20/SCK3 pin
Register SCR3 SMR PCR2
Bit Name CKE1 CKE0 COM PCR20 Pin Function
Setting Value 0 0 0 0 P20 input pin
1 P20 output pin
0 0 1 X SCK3 output pin
0 1 X X SCK3 output pin
1 X X X SCK3 input pin
Legend: X: Don't care.
9.3 Port 5
Port 5 is a general I/O port also functioning as an A/D trigger input pin and wakeup interrupt input
pin. Each pin of the port 5 is shown in figure 9.3.
P57
P56
P55/WKP5/ADTR
G
P54/WKP4
P53/WKP3
P52/WKP2
P51/WKP1
P50/WKP0
Port 5
Figure 9.3 Port 5 Pin Configuration
Port 5 has the following registers.
Port mode register 5 (PMR5)
Port control register 5 (PCR5)
Port data register 5 (PDR5)
Port pull-up control register 5 (PUCR5)