Datasheet

Section 1 Overview
Rev. 6.00 Mar. 24, 2006 Page 4 of 412
REJ09B0142-0600
P10/TMOW
P11
P12
P14/IRQ0
P15/IRQ1
P16/IRQ2
P17/IRQ3/TRGV
P50/WKP0
P51/WKP1
P52/WKP2
P53/WKP3
P54/WKP4
P55/WKP5/ADTR
G
PB0/AN0
PB1/AN1
PB2/AN2
PB3/AN3
PB4/AN4
PB5/AN5
PB6/AN6
PB7/AN7
V
CC
V
SS
V
CL
RES TEST NMI
AV CC
P20/SCK3
P21/RXD
P22/TXD
SDA
SCL
P80/FTCI
P81/FTIOA
P82/FTIOB
P83/FTIOC
P84/FTIOD
P85
P86
P87
P74/TMRIV
P75/TMCIV
P76/TMOV
OSC1 OSC2 X1 X2
CPU
H8/300H
ROM
RAM
EEPROM
SCI3
Timer W
I
2
C bus
interface
I
2
C bus
Timer A
Watchdog
timer
Timer V
A/D
converter
Port 1
Subclock
generator
System
clock
generator
Port 2
Port 5
Port B
Port 7 Port 8
Data bus (upper)
Address bus
Note : The H8/3664N is a stacked-structure product in which an EEPROM chip is mounted on the
H8/3664F-ZTAT
TM
version.
Data bus (lower)
Figure 1.2 Internal Block Diagram of H8/3664N of F-ZTAT
TM
Version with EEPROM