Datasheet

Section 17 EEPROM
Rev. 6.00 Mar. 24, 2006 Page 289 of 412
REJ09B0142-0600
17.2 Input/Output Pins
Pins used in the EEPROM are listed in table 17.1.
Table 17.1 Pin Configuration
Pin name Symbol
Input/
Output Function
Serial clock
pin
SCL Input The SCL pin is used to control serial input/output data timing.
The data is input at the rising edge of the clock and output at
the falling edge of the clock. The SCL pin needs to be pulled
up by resistor as that pin is open-drain driven structure of the
I
2
C pin. Use proper resistor value for your system by
considering V
OL
, I
OL
, and the C
IN
pin capacitance in section
20.2.2, DC Characteristics and in section 20.2.3, AC
Characteristics. Maximum clock frequency is 400 kHz.
Serial data
pin
SDA Input/
Output
The SDA pin is bidirectional for serial data transfer. The SDA
pin needs to be pulled up by resistor as that pin is open-drain
driven structure. Use proper resistor value for your system by
considering V
OL
, I
OL
, and the C
IN
pin capacitance in section
20.2.2, DC Characteristics and in section 20.2.3, AC
Characteristics. Except for a start condition and a stop
condition which will be discussed later, the high-to-low and
low-to-high change of SDA input should be done during SCL
low periods.
17.3 Register Description
The EEPROM has a following register.
• EEPROM key register (EKR)
17.3.1 EEPROM Key Register (EKR)
EKR is an 8-bit readable/writable register, which changes the slave address code written in the
EEPROM. The slave address code is changed by writing H'5F in EKR and then writing either of
H'00 to H'07 as an address code to the H'FF09 address in the EEPROM by the byte write method.
EKR is initialized to H'FF.