Datasheet

Section 15 I
2
C Bus Interface (IIC)
Rev. 6.00 Mar. 24, 2006 Page 262 of 412
REJ09B0142-0600
15.4.9 Sample Flowcharts
Figures 15.13 to 15.16 show sample flowcharts for using the I
2
C bus interface in each mode.
Start
Initialize
Set MST = 1 and
TRS = 1 in ICCR
Write BBSY =1 and
SCP = 0 in ICCR
Write transmit data in ICDR
Clear IRIC in ICCR
No
No
Yes
Yes
Yes
Yes
No
No
[1] Initialization
[3] Select master transmit mode.
[4] Start condition issuance
[6] Set transmit data for the first byte
(slave address + R/W).
(After writing ICDR, clear IRIC
continuously)
[9] Set transmit data for the second and
subsequent bytes.
(After writing ICDR, clear IRIC
immediately)
[2] Test the status of the SCL and SDA lines.
[7] Wait for 1 byte to be transmitted.
[10] Wait for 1 byte to be transmitted.
[11] Test for end of tranfer
[12] Stop condition issuance
[8] Test the acknowledge bit,
transferred from slave device.
[5] Wait for a start condition
Read IRIC in ICCR
Read ACKB in ICSR
IRIC = 1?
ACKB = 0?
Transmit mode?
Write transmit data in ICDR
Clear IRIC in ICCR
Read IRIC in ICCR
Read ACKB in ICSR
Clear IRIC in ICCR
End of transmission?
or ACKB = 1?
Write BBSY = 0 and
SCP = 0 in ICCR
End
Read BBSY in ICCR
BBSY = 0?
Yes
No
Read IRIC in ICCR
IRIC = 1?
Yes
No
Yes
No
IRIC = 1?
Master receive mode
Figure 15.13 Sample Flowchart for Master Transmit Mode