Datasheet

Section 15 I
2
C Bus Interface (IIC)
Rev. 6.00 Mar. 24, 2006 Page 259 of 412
REJ09B0142-0600
SDA
(slave output)
SDA
(master output)
SCL
(slave output)
21 21436587998
Bit
7
Bit
6
Bit
5
Bit
7
Bit
6
Bit
4
Bit
3
Bit
2
Bit
1
Bit
0
IRIC
ICDRS
ICDRT
TDRE
SCL
(master output)
Interrupt
request
generation
Interrupt
request
generation
Interrupt
request
generation
Slave receive mode Slave transmit mode
Data 1 Data 2
[3] IRIC
clearance
[5] IRIC
clearance
[3] ICDR
write
[3] ICDR
write
[5] ICDR
write
User processing
Data 1
Data 1
Data 2
Data 2
A
R/W
A
[3]
[2]
Figure 15.9 Example of Slave Transmit Mode Operation Timing
(MLS = 0)
S DATA DATA P
1
1n8
1 m
FS = 1 and FSX = 1
n: transfer bit count
(n = 1 to 8)
m: transfer frame count
(m 1)
Figure 15.10 I
2
C Bus Data Format (Serial Format)
15.4.6 Clock Synchronous Serial Format
Serial format is a non-addressing format that has no acknowledge bit. Figure 15.10 shows this
format.