Datasheet

Section 12 Timer W

Rev. 6.00 Mar. 24, 2006 Page 189 of 412

REJ09B0142-0600

Compare match B

signal

FTIOB pin

TCRW

write signal

Set value

Bit

TRCCR1

CCLR

CKS2

CKS1

CKS0

TOD

TOC

TOB

76543210

TOA

Expected

output

Remains high because the writing 1

to TOB has priority

TCRW has been set to H'06. Compare match B and compare match C are used. The FTIOB pin is the 1 output state,

and is set to the toggle output or the 0 output on compare match B.

When BCLR#2, @TCRW is executed to clear the TOC bit (the FTIOC signal is low) and compare match B occurs

at the same timing as shown below, the H'02 writing to TCRW has priority and compare match B does not drive the

FTIOB signal low; the FTIOB signal remains high.

BCLR#2, @TCRW

(1) TCRW read operation: Read H'06

(2) Modify operation: Modify H'06 to H'02

(3) Write operation to TCRW: Write H'02

Figure 12.26 When Compare Match and Bit Manipulation Instruction to TCRW

Occur at the Same Timing