Datasheet

Section 6 Power-Down Modes
Rev. 6.00 Mar. 24, 2006 Page 94 of 412
REJ09B0142-0600
6.4.2 Direct Transition from Subactive Mode to Active Mode
The time from the start of SLEEP instruction execution to the end of interrupt exception handling
(the direct transition time) is calculated by equation (2).
Direct transition time = {(number of SLEEP instruction execution states) +
(number of internal processing states)} × (tsubcyc before transition) +
{(waiting time set in bits STS2 to STS0) + (number of interrupt exception handling states)} ×
(tcyc after transition)…………………………………………………………………………(2)
Example
Direct transition time = (2 + 1) × 8 tw + (8192 + 14) × tosc = 24tw + 8206 tosc
(when the CPU operating clock of φ
w
/8 → φ
osc
and a waiting time of 8192 states are selected)
[Legend]
tosc: OSC clock cycle time
tw: watch clock cycle time
tcyc: system clock (φ) cycle time
tsubcyc: subclock (φ
SUB
) cycle time
6.5 Module Standby Function
The module-standby function can be set to any peripheral module. In module standby mode, the
clock supply to modules stops to enter the power-down mode. Module standby mode enables each
on-chip peripheral module to enter the standby state by setting a bit that corresponds to each
module to 1 and cancels the mode by clearing the bit to 0.
6.6 Usage Note
When subsleep mode is entered by setting the SMSEL bit to 1 while the subclock is not used (the
X
1
pin is fixed), note that active mode cannot be re-entered by using an interrupt. To use a power-
down mode while a port is retained, connect the subclock to the X
1
and X
2
pins.