Datasheet

Section 4 Address Break
Rev. 6.00 Mar. 24, 2006 Page 74 of 412
REJ09B0142-0600
When another interrupt request is accepted before an instruction to which an address break is set is
executed, exception handling of an address break interrupt is not executed. However, the ABIF bit
is set to 1 (see figure 4.4). Therefore the ABIF bit must be read during exception handling of an
address break interrupt.
0142
0144
0146
*
MOV.B #H'23,R1H
MOV.B #H'45,R1H
MOV.B #H'67,R1H
0142 0144 0146 SP-2
SP-4
001C
0900
ABIF
[Register setting]
External interrupt Underlined indicates the address to be stacked.
ABRKCR = H'80
BAR = H'0144
001C 0900
: :
[Program]
MOV
instruction
prefetch
MOV
instruction
prefetch
MOV
instruction
prefetch
Stack save
Vector
fetch
Internal
processing
External interrupt
acceptance
Internal
processing
Address bus
φ
External interrupt acceptance
Address break
interrupt request
Figure 4.4 Operation when Another Interrupt is Accepted at Address Break Setting
Instruction