Technical information

JA5
Pin Generic Header Name CPU board
Signal Name
Device
Pin
Pin Generic Header Name CPU board
Signal Name
Device
Pin
1 AD4 AN4 124 2 AD5 AN5 126
3 AD6 AN6 127 4 AD7 AN7 128
5 CAN1TX - - 6 CAN1RX - -
7 CAN2TX - - 8 CAN2RX - -
9 AD8 AN8 129 10 AD9 AN9 130
11 AD10 AN10 131 12 AD11 AN11 132
13 TIOC0A TIOCA0 56 14 TIOC0B TIOCB0 57
15 TIOC0C TIOCC0 58 16 M2_TRISTn - -
17 TCLKC TCLKC 100 18 TCLKD TCLKD 101
19 M2_Up - - 20 M2_Un - -
21 M2_Vp - - 22 M2_Vn - -
23 M2_Wp - - 24 M2_Wn - -
Table 9-7: JA5 Standard Generic Header
JA6
Pin Generic Header Name CPU board
Signal Name
Device
Pin
Pin Generic Header Name CPU board
Signal Name
Device
Pin
1 DREQ DREQn 93 2 DACK DACKn 100
3 TEND TENDn 94 4 STBYn STBYn 102
5 RS232TX RS232TX - 6 RS232RX RS232RX -
7 SCIbRX RXD4 108 8 SCIbTX TXD4 107
9 SCIcTX TXD5 13 10 SCIbCK SCK4 109
11 SCIcCK SCK5 11 12 SCIcRX RXD5 12
13 - - - 14 - - -
15 - - - 16 - - -
17 - - - 18 - - -
19 - - - 20 - - -
21 - - - 22 - - -
23 - - - 24 - - -
Table 9-8: JA6 Standard Generic Header
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