Technical information

4
Default:
47 k
User system
interface cable
MCU
47
Vcc
Figure 2.1 Default User System Interface Circuit
Mode Pins (MD2, MD1 and MD0), NMI, STBY and RESET: The NMI signal is input to the MCU
through the emulator control circuit. The rising/falling time of the NMI signal must be 8 ns/V or less.
The mode pins are only monitored. The CPU mode depends on the HDI Configuration settings.
47 k
User system
interface cable
Emulator
control
circuit
47
Vcc
Figure 2.2 User System Interface Circuit for MD2, MD1, MD0, NMI, STBY, and RESET
PF0:
User system
interface cable
MCU
47
Vcc
PF0
CBTS3306
47 k
Figure 2.3 User System Interface Circuit for PF0
PC0-PC7:
User system
interface cable
MCU
Vcc
PC0-PC7
CBTS3306
47 k
Figure 2.4 User System Interface Circuit for PC0-PC7