User`s manual

176
RESET and NMI: The RESET and NMI signals are input to the MCU through the emulator control circuit. The
rising/falling time of these signals must be 8 ns/V or less.
47 k
User system
interface cable
Emulator
control
circuit
47
PVcc
74HC14
Ω
Ω
Figure 7.3 User System Interface Circuit for RESET and NMI Signals
AN0 to AN15, DA0 to DA1, AVcc, AVss, and Vref:
User system
interface cable
User system
interface cable
MCU
MCU
AVcc
Vref
AVss
0.022 Fμ 0.022 Fμ
27 kΩ
AN0-AN15,
DA0-DA1
AVcc
Figure 7.4 User System Interface Circuit for AN0 to AN15, DA0 to DA1, AVcc, AVss, and Vref Signals
IRQ0–IRQ7 and WAIT: The IRQ0 to IRQ7 and WAIT signals are input to the MCU and also to the trace
acquiring circuit. Therefore, the rising and falling time of these signals must be within 8 ns/v or shorter.
47 k
User system
interface cable
MCU
47
PVcc
47 k
User system
interface cable
connected by
cable head
Emulator
control
circuit
47
PVcc
Trace
buffer
Ω
Ω
Ω
Ω
Figure 7.5 User System Interface Circuit for IRQ0–IRQ7 and WAIT Signals