Hardware manual

Microcomputer Technical Q&A
78
Q&A No.: QAH8S-206
Category: DMAC
Subject: Interrupt Acceptance After End of Transfer
Question
After the transfer count register value reaches H'0000 and an end interrupt is generated while the
DMAC is being used, when is the next transfer request accepted?
Answer
The next transfer request is accepted when a bit is set to 1 by software in the data transfer control
register (DTCR). When the transfer count register value reaches H'0000 and a transfer end
interrupt is generated, the DTE bit is cleared and data transfer is disabled. To perform transfer
again, make the transfer count register setting in the transfer end interrupt routine, then set the
DTE bit to 1.
Applicable Products
Applicability Series Applicability Series Applicability Series
Entire H8S Series Yes H8S/2655 Yes H8S/2350
H8S/2355 Yes H8S/2357 H8S/2345
H8S/2245 H8S/2148 H8S/2144
H8S/2138 H8S/2134 H8S/2128
H8S/2124 — — — —