Hardware manual
iii
On-Chip I/O
DMAC
Subject: Number of States between Transfers.............................................................................. 71
Subject: Maximum Transfer Rate ................................................................................................ 72
Subject: Difference between DMAC and DTC............................................................................ 73
Subject: Alternate 8-Bit/16-Bit Space Accesses .......................................................................... 74
Subject: TEND Signal Output Conditions when Using Write Buffer Function .......................... 76
Subject: Interrupt Acceptance After End of Transfer .................................................................. 78
Subject: Handling of Transfer Request before Start of Transfer.................................................. 79
Subject: Activation Request Signal Detection ............................................................................. 80
Subject: Short Address Mode and Full Address Mode................................................................ 82
Subject: Bus Right in Standby State ............................................................................................ 83
Subject: Handling of Transfer End Interrupt................................................................................ 84
Subject: DREQ Signal Input ........................................................................................................ 86
DTC
Subject: Nature of DTC................................................................................................................ 87
Subject: Maximum Number of Channels..................................................................................... 88
Subject: Setting Register Information.......................................................................................... 89
Subject: Order of Setting Register Information............................................................................ 90
Subject: Use of DTC Interrupt Select Bit (DISEL)...................................................................... 91
TPU (16-Bit Timers)
Subject: Non-Timer Use of Port................................................................................................... 92
Subject: Cascaded Connection ..................................................................................................... 93
Subject: Dual Use of PWM Mode 1 and Input Capture............................................................... 94
Subject: Setting PWM Mode 2 Cycle .......................................................................................... 95
Subject: Synchronous Operation of Two Sets.............................................................................. 96
Subject: Two-Phase PWM Output ............................................................................................... 97
WDT
Subject: Interval Timer with Arbitrary Time Interval.................................................................. 99
SCI
Subject: SCI Initialization ............................................................................................................ 100
Subject: Difference between TDRE Flag and TEND Flag .......................................................... 101
Subject: Initial State of TxD Pin .................................................................................................. 102
Subject: Maximum External Clock Input Value (Asynchronous Mode) ..................................... 103
Subject: Transmit/Receive Operation in Synchronous Mode...................................................... 104
Subject: SCI Transmission Using DTC........................................................................................ 105
Subject: Permissible Bit Rate Error in Asynchronous Mode ....................................................... 106
Subject: Operation of RDRF Flag................................................................................................ 109