Hardware manual

Microcomputer Technical Q&A
8
Q&A No.: QAH8S-007
Category: CPU
Subject: EXR Register
Question
Why has the EXR registers been added?
Answer
There are two reasons:
• Providing 8 interrupt mask levels using I2 to I0 enables multiple interrupt handling to be
speeded up.
• Trace functions are implemented using the T bit. When the T bit is set to 1, trace exception
handling is started each time an instruction is executed. For details, see the hardware manual.
Applicable Products
Applicability Series Applicability Series Applicability Series
Entire H8S Series Yes H8S/2655 Yes H8S/2350
Yes H8S/2355 Yes H8S/2357 Yes H8S/2345
H8S/2245 H8S/2148 H8S/2144
H8S/2138 H8S/2134 H8S/2128
H8S/2124 — — — —