Hardware manual

Microcomputer Technical Q&A
114
Q&A No.: QAH8S-235
Category: SCI
Subject: Continuous Transmission/Reception in Synchronous Mode Using
External Clock
Questions
In synchronous mode operation using an external clock:
1. If, after transmission of one data byte is completed, the external clock is input to the SCK pin
before the CPU has written the next transmit data to the transmit data register (TDR), will the
SCI start the next transmit operation?
2. What happens after completion of reception?
3. What will happen if the TDRE bit is cleared to 0 in the serial status register (SSR) without
writing transmit data to TDR?
Answers
1. No, transmission will not be started. The next transmission is not performed until the TDRE bit
is cleared to 0 in the serial status register (SSR).
2. Reception is started. However, if the RDRF bit is not cleared to 0 in SSR before reception of
the next data is completed, an overrun error will occur.
3. The first time, H'FF (the initial value of TDR) will be transmitted. From the second time
onward, the previous TDR value will be transmitted.
Applicable Products
Applicability Series Applicability Series Applicability Series
Yes Entire H8S Series H8S/2655 H8S/2350
H8S/2355 H8S/2357 H8S/2345
H8S/2245 H8S/2148 H8S/2144
H8S/2138 H8S/2134 H8S/2128
H8S/2124 — — — —