Hardware manual

Microcomputer Technical Q&A
112
2. The RDRF flag is set following the fall of the serial clock after the MSB data is received (see
figure below).
Bit 6 Bit 7
Serial clock
Receive data
RDRF
When SCK clock source is internal clock: 1 state
When SCK clock source is external clock: 2 to 3 states
In Synchronous Mode