Product data

AL is cleared by reading AL after it has been set to 1, then writing 0 in AL. In addition, AL is

reset automatically by write access to ICDR in transmit mode, or read access to ICDR in receive

mode.

Bit 3

AL Description

0 Bus arbitration won

[Clearing conditions]

1. When ICDR data is written (transmit mode) or read (receive mode)

2. When 0 is written in AL after reading AL = 1

(Initial value)

1 Arbitration lost

[Setting conditions]

1. If the internal SDA and SDA pin disagree at the rise of SCL in master transmit

mode

2. If the internal SCL line is high at the fall of SCL in master transmit mode

Bit 2—Slave Address Recognition Flag (AAS): In I

C bus format slave receive mode, this flag is

set to 1 if the first frame following a start condition matches bits SVA6 to SVA0 in SAR, or if the

general call address (H'00) is detected.

AAS is cleared by reading AAS after it has been set to 1, then writing 0 in AAS. In addition, AAS

is reset automatically by write access to ICDR in transmit mode, or read access to ICDR in receive

mode.

Bit 2

AAS Description

0 Slave address or general call address not recognized

[Clearing conditions]

1. When ICDR data is written (transmit mode) or read (receive mode)

2. When 0 is written in AAS after reading AAS = 1

3. In master mode

(Initial value)

1 Slave address or general call address recognized

[Setting condition]

When the slave address or general call address is detected in slave receive mode

while FS = 0