Product data

139
(1) Clock Timing
Table 22.28 shows the clock timing. The clock timing specified here covers clock (ø) output and
clock pulse generator (crystal) and external clock input (EXTAL pin) oscillation settling times.
For details of external clock input (EXTAL pin and EXCL pin) timing, see section 20, Clock
Pulse Generator.
Table 22.28 Clock Timing
Condition A: V
CC
= 5.0 V ± 10%, V
SS
= 0 V, ø = 2 MHz to maximum operating frequency,
T
a
= –20 to +75°C (regular specifications),
T
a
= –40 to +85°C (wide-range specifications)
Condition B: V
CC
= 4.0 V to 5.5 V, V
SS
= 0 V, ø = 2 MHz to maximum operating frequency,
T
a
= –20 to +75°C (regular specifications),
T
a
= –40 to +85°C (wide-range specifications)
Condition C: V
CC
= 2.7 V to 5.5 V, V
SS
= 0 V, ø = 2 MHz to maximum operating frequency,
T
a
= –20 to +75°C
Condition A Condition B Condition C
20 MHz 16 MHz 10 MHz
Test
Item Symbol Min Max Min Max Min Max Unit Conditions
Clock cycle time t
cyc
50 500 62.5 500 100 500 ns Figure 22.53
Clock high pulse
width
t
CH
17 — 20 — 30 — ns Figure 22.53
Clock low pulse
width
t
CL
17 — 20 — 30 — ns
Clock rise time t
Cr
— 8 — 10 — 20 ns
Clock fall time t
Cf
— 8 — 10 — 20 ns
Oscillation settling
time at reset
(crystal)
t
OSC1
10 — 10 — 20 — ms Figure 22.54
Figure 22.55
Oscillation settling
time in software
standby (crystal)
t
OSC2
8— 8— 8— ms
External clock
output stabilization
delay time
t
DEXT
500 — 500 — 500 — µs