Technical data

FIRE Emulator for H8S and H8/300H 24 Special Settings and Restrictions H8S/222x/

SYStem.CPU Operation mode

This option specifies operation mode of the cpu, which is normally defined with the MD0..2 pins of the cpu.

But, the values of this pins in the target are not responsible for the operation mode, so that the pin levels can

differ from the emulator setting.

SYStem.Option SUBCLK Subclock enable

If this option is on, then a 32,768 kHz subclock is fed into the pin OSC1, otherwise it is tied to VCC. The

OSC1 pin from the target is ignored. To avoid monitor timeout, waitstates should not be used in subclock

mode.

SYStem.Option TPU Control of timer pulse unit

This option controls the timers of the CPUs Timer Pulse Unit for each channel independently.

Format: SYStem.CPU <mode>

<mode>: EXP16M8

EXP16M16

ROM16M8

SINGLE16M

EXP16M8 Expanded mode with 16 MByte address range, 8-bit initial bus width and onchip

ROM disabled

EXP16M16 Expanded mode with 16 MByte address range, 16-bit initial bus width and

onchip ROM disabled

ROM16M8 Expanded mode with 16 MByte address range, 8-bit initial bus width and onchip

ROM enabled

SINGLE16M Single-chip mode with 16 MByte address range

Format: SYStem.Option SUBCLK [ON | OFF]

Format: SYStem.Option TPU<channel> [ON | OFF]

<channel>: 0 | 1 | 2 | 3 | 4 | 5