Specifications

Memory wait states
Access to on-chip memory (ROM, RAM or register field) does not involve wait states, but off-
chip memory access can force the processor to wait. The number of wait states must then be
given as command-line options -read_ws and -write_ws for the reading and writing wait states
respectively. By default Bound-T assumes zero wait states.
At present it is not possible to specify a different number of wait states for different parts
(address ranges) of the off-chip memory.
Summary of approximations
The following table lists the cases where Bound-T uses an approximate model of the timing of
H8/300 instructions.
Table 12: Approximations for instruction times
Case Description Maximum Error
Memory areas
with different
access time
For a memory access with a dynamically computed
address (register indirect) Bound-T cannot always
determine which kind of memory area is accessed (on-chip
memory, on-chip register field, or external memory).
Bound-T assumes the worst case (external memory).
Per octet access: 4 states
plus the number of wait-
states defined for
external memory.
MOVFPE
MOVTPE
The operand access time is variable between 9 and 16
states because these instructions synchronize with the
peripheral E (enable) clock.. Bound-T assumes the worst
case.
Per executed instruction:
7 states.
Bound-T for H8/300 Supported H8/300 Features 31