Specifications

H8/300 instruction Remarks
DAA, DAS, DIVXU Result is opaque.
ROTL,ROTR, ROTXL, ROTXR, SHAL, SHAR,
SHLL, SHLR
Result is opaque.
BAND, BIAND, BILD, BIST, BLD, BNOT, BOR, BSET,
BTST, BXOR
Result is opaque.
LDC with register operand The Z and C flags become opaque.
STC
The destination register becomes opaque.
Changing the enabled/disabled state of the
on-chip RAM when accessing data in this
part of the address space
The enabled/disabled state in effect chooses between two
memory banks, on-chip and off-chip. Bound-T does not track
this change and so its data-flow analysis is wrong.
JMP @Rn
JMP @@aa:8 with dynamic vector
If the dynamic target address is not resolved, the WCET bound
for this subprogram omits the rest of the control flow (the JMP
is taken as a return from the subprogram).
JSR @Rn
JSR @@aa:8 with dynamic vector
Modelled as a call with a dynamically computed target
address.
Changing the enabled/disabled state of the
on-chip RAM when executing code from this
part of the address space
The enabled/disabled state in effect chooses between two
memory banks, on-chip and off-chip. Bound-T does not track
this change and so its understanding of which instructions are
fetched and executed is wrong.
Self-modifying code Not supported.
5.3 Registers and memory locations
This section explains how Bound-T models the H8/300 registers and memory. Chapter 6
describes the additional support when some specific procedure calling protocol is in use.
General registers R0 .. R7 and their low and high octet parts
All H8/300 general registers (R0 .. R7, R0L .. R7L, R0H .. R7H) are supported fully by Bound-T
as operands and destination registers for instructions. Each register is modelled as a separate
data cell, but an automatic connection is defined between the word registers and their octet
parts as follows:
• When an octet-wide instruction assigns a value to an octet register, Bound-T includes an
implied assignment of an opaque value to the corresponding word register. For example, an
instruction with destination R4H or R4L implies that R4 receives an opaque value.
• When a word-wide instruction other than MOV.W assigns a value to a word register, Bound-
T includes implied assignments of opaque values to the octet parts of the word register. For
example, an instruction with destination R2 implies that R2L and R2H receive opaque
values.
• When a MOV.W copies an immediate operand (a static literal value) or a 16-bit register or a
memory word into another 16-bit register or memory word, Bound-T includes implied
assignments of the corresponding octet parts. For example, the instruction MOV.W R1, R6,
with the principal effect R6 := R1, implies the assignments R6L := R1L and R6H := R1H.
Bound-T for H8/300 Supported H8/300 Features 23