Specifications

4 THE H8/300 PROCESSOR AND TIMING ANALYSIS
This chapter starts by describing the H8/300 processor. The focus is on how the H8/300
architecture and instruction set are likely to be used for the coding of loops, loop counters and
accesses to subprogram parameters, which are the most important aspects for analysing the
worst-case execution path and worst-case stack usage.
Then we explain in a general way how Bound-T models and analyses this processor. Some
registers and instructions are modelled exactly, others approximately, and some not at all (or
very approximately). Two aspects of the model and analysis are important:
• The effect of each instruction on the computation and on the control flow.
• The contribution of each instruction to the total execution time.
Chapter 5 then explains the supported features and the model and analysis in more detail.
4.1 H8/300 architecture and instruction set
The H8/300 [4] is an 8/16-bit microcontroller. It has a "von Neumann" architecture (a
common memory for program and data). The memory address is 16 bits so at most 64 kilo-
octets can be addressed (without paging schemes).
General registers
The processor has eight 16-bit general registers R0 .. R7. The registers can also be accessed as
sixteen 8-bit registers by appending L or H to the register name to specify the low or high octet.
Register R7 has the special function of a stack pointer and is also known as SP.
Instruction set
The instruction set provides 8-bit and 16-bit integer addition, subtraction, multiplication (8
bits times 8 bits giving a 16-bit product) and division (16 bits divided by 8 bits giving an 8-bit
quotient and an 8-bit remainder).
The instruction set is complete enough that one can use 8-bit-wide instructions (eg. ADD.B) for
most 8-bit computations and 16-bit-wide instructions (eg. ADD.W) for most 16-bit
computations.
However, the instruction set is not fully orthogonal for data width; some kinds of instructions
allow only 8-bit data and others only 16-bit data. For example, there addition, subtraction or
comparison instructions that work on a 16-bit immediate value and a 16-bit register. This
means that some 16-bit computations must be built up from 8-bit-wide instructions. For
example, to add a 16-bit immediate value to a 16-bit register one would use the ADD.B
instruction to add the low octet of the immediate to the low octet of the register, followed by
an ADDX (add with carry) instruction to add the high octet of the immediate value to the high
octet of the register, including the possible carry from the ADD.B.
Signed integers are represented in two's complement notation as usual, so the same ADD and
SUB instructions apply to both signed and unsigned data. The conditional branch instruction
Bcc provides different condition codes for signed and unsigned comparisons. Also the
multiplication and division instructions are sensitive to signedness.
There are also instructions for processing individual bits. The core H8/300 does not support
hardware floating point operations.
16 H8/300 Timing Analysis Bound-T for H8/300