Hardware manual

Rev. 3.0, 09/98, page 72 of 361
SP-4
SP-3
SP-2
SP-1
SP(R7)
Stack area
SP(R7)
SP+1
SP+2
SP+3
SP+4 Even address
After interrupt
is acceptedPushed onto stack
Before interrupt
is accepted
CCR
CCR*
PC
H
PC L
Legend:
PC
H
PC L
CCR
SP
Program counter (upper byte)
Program counter (lower byte)
Condition code register
Stack pointer
The PC contains the address of the first instruction
executed after return.
Registers must be saved and restored by word
access at an even address.
* Ignored on return.
Notes: 1.
2.
Figure 4.5 Usage of Stack in Interrupt Handling