Hardware manual

Rev. 3.0, 09/98, page 54 of 361
3.1.2 Mode and System Control Registers (MDCR and SYSCR)
Table 3.2 lists the registers related to the chip’s operating mode: the system control register
(SYSCR) and mode control register (MDCR). The mode control register indicates the inputs to the
mode pins MD
1
and MD
0
.
Table 3.2 Mode and System Control Registers
Name Abbreviation Read/Write Address
System control register SYSCR R/W H'FFC4
Mode control register MDCR R H'FFC5
3.2 System Control Register (SYSCR)H'FFC4
Bit:76543210
SSBY STS2 STS1 STS0  NMIEG DPME RAME
Initial value:00001001
Read/Write: R/W R/W R/W R/W  R/W R/W
*
R/W
Note: Do not write “1” in this bit.
The system control register (SYSCR) is an eight-bit register that controls the operation of the chip.
Bit 7Software Standby (SSBY): Enables transition to the software standby mode. For details,
see section 14, “Power-Down State.”
On recovery from software standby mode by an external interrupt, the SSBY bit remains set to
“1.” It can be cleared by writing “0.”
Bit 7
SSBY Description
0 The SLEEP instruction causes a transition to sleep mode. (Initial value)
1 The SLEEP instruction causes a transition to software standby mode.