Hardware manual

Rev. 3.0, 09/98, page 357 of 361
Table C.1 Pin States (cont)
Pin Name
MCU
Mode Reset
Hardware
Standby
Software
Standby Sleep Mode
Normal
Operation
P6
7
− P6
0
1
2
3
3-State 3-State Prev. state* Prev. state I/O port
P7
7
− P7
0
1
2
3
3-State 3-State 3-State 3-State Input port
P8
6
− P8
0
1
2
3
3-State 3-State Prev. state* Prev. state I/O port
P9
7
/WAIT 1 3-State 3-State 3-State 3-State WAIT
2
3 Prev. state Prev. state I/O port
P96/φ 1 3-State
2
Clock
output
High Clock output Clock output
3 3-State High if DDR = 1,
3-state if
DDR = 0
Clock output if
DDR = 1, 3-state
if DDR = 0
Clock output if
DDR = 1, input
port if DDR = 0
1 High 3-State
2
High High AS, WR, RDP9
5
− P9
3
,
AS, WR, RD
3 3-State Prev. state Prev. state I/O port
P9
2
− P9
0
1 3-State 3-State Prev. state Prev. state I/O port
2
3
Notes: 1. 3-State: High-impedance state
2. Prev. state: Previous state. Input ports are in the high-impedance state (with the MOS
pull-up on if PCR = 1). Output ports hold their previous output level.
3. I/O port: Direction depends on the data direction (DDR) bit. Note that these pins may
also be used by the on-chip supporting modules.
See section 5, “I/O Ports,” for further information.
* On-chip supporting modules are initialized, so these pins revert to I/O ports according to
the DDR and DR bits.