
Rev. 3.0, 09/98, page 355 of 361
ADCRA/D Control Register H'FFEA A/D
Bit
Initial value
Read/Write
7
TRGE
0
R/W
6
—
1
—
5
—
1
—
4
—
1
—
3
—
1
—
0
CHS
0
R/W
2
—
1
—
1
—
1
—
Trigger Enable
ADTRG is disabled.
ADTRG is enabled. A/D conversion can be started by
external trigger, or by software.
0
1
Reserved bit.