Hardware manual

Rev. 3.0, 09/98, page 354 of 361
ADCSRA/D Control/Status Register H'FFE8 A/D
Bit
Initial value
Read/Write
7
ADF
0
R/(W)*
6
ADIE
0
R/W
5
ADST
0
R/W
4
SCAN
0
R/W
3
CKS
0
R/W
0
CH0
0
R/W
2
CH2
0
R/W
1
CH1
0
R/W
Clock Select
CH2 CH1 CH0 Single mode Scan mode
0 0 0 AN0 AN0
0 1 AN1 AN0, AN1
1 0 AN2 AN0 to AN2
1 1 AN3 AN0 to AN3
1 0 0 AN4 AN4
0 1 AN5 AN4, AN5
1 0 AN6 AN4 to AN6
1 1 AN7 AN4 to AN7
A/D Start
0 A/D conversion is halted.
1.
2.
Single mode: One A/D conversion is performed, then this bit is
automatically cleared to “0.”
Scan mode: A/D conversion starts and continues cyclically on
all selected channels until “0” is written in this bit.
1
A/D End Flag
0
Note: Software can write a “0” in bit 7 to clear the flag, but cannot write a “1” in this bit.
Cleared from "1" to "0" when CPU reads ADF = "1," then writes "0" in ADF.
Set to "1" at the following times:
1.
2.
Single mode: at the completion of A/D conversion
Scan mode: when all selected channels have been converted.
1
A/D Interrupt Enable
0 The A/D interrupt request (ADI) is disabled.
The A/D interrupt request (ADI) is enabled.
Scan Mode
Single mode
Scan mode
0
1
Clock Select
Conversion time = 242 states (max)
Conversion time = 122 states (max)
0
1
1