Hardware manual

Rev. 3.0, 09/98, page 341 of 361
SYSCRSystem Control Register H'FFC4 System Control
Bit
Initial value
Read/Write
7
SSBY
0
R/W
6
STS2
0
R/W
5
STS1
0
R/W
4
STS0
0
R/W
3
—
1
—
0
RAME
1
R/W
2
NMIEG
0
R/W
1
DPME
0
R/W*
Dual-Port RAM Enable
Not supported. (Do not set to “1.”)
RAM Enable
0 On-chip RAM is disabled.
On-chip RAM is enabled.
1
Standby Timer Select
0 0 0 Clock settling time = 8192 states
0 0 1 Clock settling time = 16384 states
0 1 0 Clock settling time = 32768 states
0 1 1 Clock settling time = 65536 states
1 – – Clock settling time = 131072 states
NMI Edge
0 Falling edge of NMI is detected.
Rising edge of NMI is detected.
1
Software Standby
0
Note: * Do not set DPME to 1.
SLEEP instruction causes transition to sleep mode.
SLEEP instruction causes transition to software standby mode.
1