Hardware manual

Rev. 3.0, 09/98, page 337 of 361
P3DRPort 3 Data Register H'FFB6 Port 3
Bit
Initial value
Read/Write
7
P3
7
0
R/W
6
P3
6
0
R/W
5
P3
5
0
R/W
4
P3
4
0
R/W
3
P3
3
0
R/W
0
P3
0
0
R/W
2
P3
2
0
R/W
1
P3
1
0
R/W
P4DDRPort 4 Data Direction Register H'FFB5 Port 4
Bit
Initial value
Read/Write
7
P4
7 DDR
0
W
6
P4
6 DDR
0
W
5
P4
5 DDR
0
W
4
P4
4 DDR
0
W
3
P4
3 DDR
0
W
0
P4
0 DDR
0
W
2
P4
2 DDR
0
W
1
P4
1 DDR
0
W
Port 4 Input/Output Control
Input port
Output port
0
1
P4DRPort 4 Data Register H'FFB7 Port 4
Bit
Initial value
Read/Write
7
P4
7
0
R/W
6
P4
6
0
R/W
5
P4
5
0
R/W
4
P4
4
0
R/W
3
P4
3
0
R/W
0
P4
0
0
R/W
2
P4
2
0
R/W
1
P4
1
0
R/W
P5DDRPort 5 Data Direction Register H'FFB8 Port 5
Bit
Initial value
Read/Write
7
—
1
—
6
—
1
—
5
—
1
—
4
—
1
—
3
—
1
—
0
P5
0 DDR
0
W
2
P5
2 DDR
0
W
1
P5
1 DDR
0
W
Port 5 Input/Output Control
Input port
Output port
0
1