Hardware manual

Rev. 3.0, 09/98, page 22 of 361 Table 2.2 Effective Address Calculation
Addressing mode and
instruction format
op reg
76 34015
No. Effective address calculation Effective address
1 Register direct, Rn
Operands are contained in registers regm
and regn
Register indirect, @Rn
16-bit register contents
015
Register indirect with displacement,
@(d:16, Rn)
op regm regn
87 34015
op reg
76 34015
disp
op reg
76 34015
Register indirect with
post-increment, @Rn+
op reg
76 34015
Register indirect with pre-decrement,
@–Rn
2
3
4
1 for a byte operand, 2 for a word operand
015
disp
015
015
015
1 or 2
015
015
1 or 2
015
regm
30
regn
30
16-bit register contents
16-bit register contents
16-bit register contents
*
*
*Note: