Hardware manual

Rev. 3.0, 09/98, page 304 of 361
Table A.1 Instruction Set (cont)
Mnemonic Operation
Addressing Mode/
Instruction Length (Bytes)
Operand Size
#xx: 8/16 Rn @Rn @(d:16, Rn) @–Rn/@Rn+ @aa: 8/16 @(d:8, PC) @@aa Implied No. of States
IHNZVC
Condition Code
JSR @@aa:8
RTS
RTE
SLEEP
LDC #xx:8, CCR
LDC Rs, CCR
STC CCR, Rd
ANDC #xx:8, CCR
ORC #xx:8, CCR
XORC #xx:8, CCR
NOP
SP–2 → SP
PC → @SP
PC ← @aa:8
PC ← @SP
SP+2 → SP
CCR ← @SP
SP+2 → SP
PC ← @SP
SP+2 → SP
Transit to sleep mode.
#xx:8 → CCR
Rs8 → CCR
CCR → Rd8
CCR∧#xx:8 → CCR
CCR⁄#xx:8 → CCR
CCR⊕#xx:8 → CCR
PC ← PC+2
—
—
—
B
B
B
B
B
B
—
2 —————— 8
8
10
2
2
2
2
2
2
2
2
2
↔ ↔
2
↔ ↔ ↔ ↔
2 ——————
↔ ↔
2
↔ ↔ ↔ ↔
↔ ↔
2
↔ ↔ ↔ ↔
2 ——————
↔ ↔
2
↔ ↔ ↔ ↔
↔ ↔
2
↔ ↔ ↔ ↔
↔ ↔
2
↔ ↔ ↔ ↔
2 ——————
——————
The number of states is the number of states required for execution when the instruction and its
operands are located in on-chip memory.
(1)
(2)
(3)
(4)
(5)
(6)
(7)
Set to "1" when there is a carry or borrow from bit 11; otherwise cleared to "0."
If the result is zero, the previous value of the flag is retained; otherwise the flag is cleared to "0."
Set to "1" if decimal adjustment produces a carry; otherwise cleared to "0."
The number of states required for execution is 4n+8 (n = value of R4L)
These instructions are not supported by the H8/338 Series.
Set to "1" if the divisor is negative; otherwise cleared to "0."
Cleared to "0" if the divisor is not zero; undetermined when the divisor is zero.
Notes: