Hardware manual

Rev. 3.0, 09/98, page 272 of 361
15.5 Hardware Standby Mode
15.5.1 Transition to Hardware Standby Mode
Regardless of its current state, the chip enters the hardware standby mode whenever the STBY pin
goes Low.
The hardware standby mode reduces power consumption drastically by halting the CPU, stopping
all the functions of the on-chip supporting modules, and placing I/O ports in the high-impedance
state. The registers of the on-chip supporting modules are reset to their initial values. Only the
on-chip RAM is held unchanged, provided the minimum necessary voltage supply is maintained
(at least 2V).
Notes: 1. The RAME bit in the system control register should be cleared to “0” before the STBY
pin goes Low, to disable the on-chip RAM during the hardware standby mode.
2. Do not change the inputs at the mode pins (MD1, MD0) during hardware standby
mode. Be particularly careful not to let both mode pins go Low in hardware standby
mode, since that places the chip in PROM mode and increases current dissipation.
15.5.2 Recovery from Hardware Standby Mode
Recovery from the hardware standby mode requires inputs at both the STBY and RES pins.
When the STBY pin goes High, the clock oscillator begins running. The RES pin should be Low
at this time and should be held Low long enough for the clock to stabilize. When the RES pin
changes from Low to High, the reset sequence is executed and the chip returns to the program
execution state.
15.5.3 Timing Relationships
Figure 15.2 shows the timing relationships in the hardware standby mode.
In the sequence shown, first RES goes Low, then STBY goes Low, at which point the chip enters
the hardware standby mode. To recover, first STBY goes High, then after the clock settling time,
RES goes High.