Hardware manual

Rev. 3.0, 09/98, page 233 of 361
11.2.3 A/D Control Register (ADCR)H'FFEA
Bit:76543210
TRGE CHS
Initial value:01111110
Read/Write: R/W R/W
The A/D control register (ADCR) is an 8-bit readable/writable register that enables or disables the
A/D external trigger signal.
The ADCR is initialized to H'7E at a reset and in the standby modes.
Bit 7Trigger Enable (TRGE): This bit enables the ADTRG (A/D external trigger) signal to
set the ADST bit and start A/D conversion.
Bit 7
TRGE Description
0 A/D external trigger is disabled. ADTRG does not set the ADST bit. (Initial value)
1 A/D external trigger is enabled. ADTRG sets the ADST bit.
(The ADST bit can also be set by software.)
Bits 6 to 1Reserved: These bits cannot be modified and are always read as “1.”
Bit 0Channel Set Select (CHS): This bit is reserved. It does not affect any operation in the
H8/338 Series.