Hardware manual

Rev. 3.0, 09/98, page 224 of 361
10.4 Interrupts
The SCI can request four types of interrupts: ERI, RxI, TxI, and TEI. Table 10.9 indicates the
source and priority of these interrupts. The interrupt sources can be enabled or disabled by the
TIE, RIE, and TEIE bits in the SCR. Independent signals are sent to the interrupt controller for
each interrupt source, except that the receive-error interrupt (ERI) is the logical OR of three
sources: overrun error, framing error, and parity error.
The TxI interrupt indicates that the next transmit data can be written. The TEI interrupt indicates
that the SCI has stopped transmitting data.
Table 10.9 SCI Interrupt Sources
Interrupt Description Priority
ERI Receive-error interrupt (ORER, FER, or PER) High
RxI Receive-end interrupt (RDRF)
TxI TDR-empty interrupt (TDRE)
TEI TSR-empty interrupt (TEND) Low
10.5 Application Notes
Application programmers should note the following features of the SCI.
(1) TDR Write: The TDRE bit in the SSR is simply a flag that indicates that the TDR contents
have been transferred to the TSR. The TDR contents can be rewritten regardless of the TDRE
value. If a new byte is written in the TDR while the TDRE bit is “0,” before the old TDR contents
have been moved into the TSR, the old byte will be lost. Software should check that the TDRE bit
is set to “1” before writing to the TDR.
(2) Multiple Receive Errors: Table 10.10 lists the values of flag bits in the SSR when multiple
receive errors occur, and indicates whether the RSR contents are transferred to the RDR.