Hardware manual

Rev. 3.0, 09/98, page 223 of 361
Start
Read TDRE bit in SSR
TDRE = "1"?
Write transmit data
in TDR and clear TDRE
bit to "0" in SSR
RDRF = "1"?
Read RDRF bit in SSR
End of
transmitting and receiv-
ing?
Clear TE and RE bits
to "0" in SCR
End
Error handling
1
2
3
No
Yes
Yes
No
No
Yes
5
1.
2.
3.
4.
5.
SCI initialization: the transmit data output function of the
TxD pin and receive data input function of the RxD pin are
selected, enabling simultaneous transmitting and receiving.
SCI status check and transmit data write: read the serial status
register (SSR), check that the TDRE bit is "1," then write transmit
data in the transmit data register (TDR) and clear TDRE to "0."
Transition of the TDRE bit from "0" to "1" can be reported by a
TXI interrupt.
SCI status check and receive data read: read the serial status
register (SSR), check that the RDRF bit is "1," then read receive
data from the receive data register (RDR) and clear RDRF to "0."
Transition of the RDRF bit from "0" to "1" can be reported by an
RXI interrupt.
To continue transmitting and receiving serial data: read RDR
and clear RDRF to "0" before the MSB (bit 7) of the current
frame is received. Also read the TDRE bit and check that it is
set to "1," indicating that it is safe to write; then write data
in TDR and clear TDRE to "0" before the MSB (bit 7) of the current
frame is transmitted.
Receive error handling: if a receive error occurs, read the ORER
bit in SSR then, after executing the necessary error handling,
clear ORER to "0." Neither transmitting nor receiving can resume
while ORER remains set to "1."
RDRF= "1"?
Read receive data
from RDR and clear
RDRF bit to "0" in SSR
Read RDRF bit in SSR
4
No
Yes
Initialize
Figure 10.17 Sample Flowchart for Serial Transmitting and Receiving
Note: In switching from transmitting or receiving to simultaneous transmitting and receiving,
clear both TE and RE to “0,” then set both TE and RE to “1.”