Hardware manual

Rev. 3.0, 09/98, page 9 of 361
Table 1.2 Pin Assignments in Each Operating Mode (cont)
Pin No. Expanded Modes Single-Chip Mode
CP-84
CG-84 FP-80A Mode 1 Mode 2 Mode 3
PROM
Mode
26 14 φφP9
6
/ φ NC
27 15 AS AS P9
5
NC
28 16 WR WR P9
4
NC
29 17 RD RD P9
3
NC
30 18 P9
2
/ IRQ
0
P9
2
/ IRQ
0
P9
2
/ IRQ
0
PGM
31 19 P9
1
/ IRQ
1
P9
1
/ IRQ
1
P9
1
/ IRQ
1
EA15
32 20 P9
0
/ ADTRG / IRQ
2
P9
0
/ ADTRG / IRQ
2
P9
0
/ ADTRG / IRQ
2
EA16
33 21 P6
0
/ FTCI P6
0
/ FTCI P6
0
/ FTCI NC
34 22 P6
1
/ FTOA P6
1
/ FTOA P6
1
/ FTOA NC
35 23 P6
2
/ FTIA P6
2
/ FTIA P6
2
/ FTIA NC
36 24 P6
3
/ FTIB P6
3
/ FTIB P6
3
/ FTIB V
CC
37 25 P6
4
/ FTIC P6
4
/ FTIC P6
4
/ FTIC V
CC
38 26 P6
5
/ FTID P6
5
/ FTID P6
5
/ FTID NC
39 27 P6
6
/ FTOB / IRQ
6
P6
6
/ FTOB / IRQ
6
P6
6
/ FTOB / IRQ
6
NC
40 28 P6
7
/ IRQ
7
P6
7
/ IRQ
7
P6
7
/ IRQ
7
NC
41  V
SS
V
SS
V
SS
V
SS
42 29 AV
CC
AV
CC
AV
CC
V
CC
43 30 P7
0
/ AN
0
P7
0
/ AN
0
P7
0
/ AN
0
NC
44 31 P7
1
/ AN
1
P7
1
/ AN
1
P7
1
/ AN
1
NC
45 32 P7
2
/ AN
2
P7
2
/ AN
2
P7
2
/ AN
2
NC
46 33 P7
3
/ AN
3
P7
3
/ AN
3
P7
3
/ AN
3
NC
47 34 P7
4
/ AN
4
P7
4
/ AN
4
P7
4
/ AN
4
NC
48 35 P7
5
/ AN
5
P7
5
/ AN
5
P7
5
/ AN
5
NC
49 36 P7
6
/ AN
6
/DA
0
P7
6
/ AN
6
/DA
0
P7
6
/ AN
6
/DA
0
NC
50 37 P7
7
/ AN
7
/DA
1
P7
7
/ AN
7
/DA
1
P7
7
/ AN
7
/DA
1
NC
51 38 AV
SS
AV
SS
AV
SS
V
SS
52 39 P4
0
/ TMCI
0
P4
0
/ TMCI
0
P4
0
/ TMCI
0
NC
53 40 P4
1
/ TMO
0
P4
1
/ TMO
0
P4
1
/ TMO
0
NC
54 41 P4
2
/ TMRI
0
P4
2
/ TMRI
0
P4
2
/ TMRI
0
NC
Note: Pins marked NC should be left unconnected.
For details on PROM mode, refer to 14.2, “PROM Mode.”