Hardware manual

Rev. 3.0, 09/98, page 190 of 361
10.2 Register Descriptions
10.2.1 Receive Shift Register (RSR)
Bit:76543210
Read/Write: 
The RSR is a shift register that converts incoming serial data to parallel data. When one data
character has been received, it is transferred to the receive data register (RDR).
The CPU cannot read or write the RSR directly.
10.2.2 Receive Data Register (RDR)H'FFDD, H'FF8D
Bit:76543210
Initial value:00000000
Read/Write: R R R R R R R R
The RDR stores received data. As each character is received, it is transferred from the RSR to the
RDR, enabling the RSR to receive the next character. This double-buffering allows the SCI to
receive data continuously.
The CPU can read but not write the RDR. The RDR is initialized to H'00 at a reset and in the
standby modes.
10.2.3 Transmit Shift Register (TSR)
Bit:76543210
Read/Write: 
The TSR is a shift register that converts parallel data to serial transmit data. When transmission of
this character is completed, the next character is moved from the transmit data register (TDR) to
the TSR and transmission of that character begins. If the TDRE bit is still set to “1”, however,
nothing is transferred to the TSR.
The CPU cannot read or write the TSR directly.