Hardware manual

Rev. 3.0, 09/98, page 189 of 361
Table 10.1 SCI Input/Output Pins
Channel Name Abbr. I/O Function
0 Serial clock SCK
0
Input/output Serial clock input and output.
Receive data RxD
0
Input Receive data input.
Transmit data TxD
0
Output Transmit data output.
1 Serial clock SCK
1
Input/output Serial clock input and output.
Receive data RxD
1
Input Receive data input.
Transmit data TxD
1
Output Transmit data output.
10.1.4 Register Configuration
Table 10.2 lists the SCI registers. These registers specify the operating mode (synchronous or
asynchronous), data format and bit rate, and control the transmit and receive sections.
Table 10.2 SCI Registers
Channel Name Abbr. R/W Value Address
0 Receive shift register RSR 
Receive data register RDR R H'00 H'FFDD
Transmit shift register TSR 
Transmit data register TDR R/W H'FF H'FFDB
Serial mode register SMR R/W H'00 H'FFD8
Serial control register SCR R/W H'00 H'FFDA
Serial status register SSR R/(W)
*
H'84 H'FFDC
Bit rate register BRR R/W H'FF H'FFD9
1 Receive shift register RSR 
Receive data register RDR R H'00 H'FF8D
Transmit shift register TSR 
Transmit data register TDR R/W H'FF H'FF8B
Serial mode register SMR R/W H'00 H'FF88
Serial control register SCR R/W H'00 H'FF8A
Serial status register SSR R/(W)
*
H'84 H'FF8C
Bit rate register BRR R/W H'FF H'FF89
0 and 1 Serial/timer control register STCR R/W H'F8 H'FFC3
Note: Software can write a “0” to clear the flags in bits 7 to 3, but cannot write “1” in these bits.