Hardware manual

Rev. 3.0, 09/98, page 183 of 361
Bit 7Output Enable (OE): This bit enables the timer counter and the PWM output.
Bit 7
OE Description
0 PWM output is disabled. TCNT is cleared to H'00 and stopped. (Initial value)
1 PWM output is enabled. TCNT runs.
Bit 6Output Select (OS): This bit selects positive or negative logic for the PWM output.
Bit 6
OS Description
0 Positive logic; positive-going PWM pulse, “1” = High (Initial value)
1 Negative logic; negative-going PWM pulse, “1” = Low
Bits 5 to 3Reserved: These bits cannot be modified and are always read as “1.”
Bits 2, 1, and 0Clock Select (CKS2, CKS1, and CKS0): These bits select one of eight
internal clock sources obtained by dividing the system clock (φ).
Bit 2
CKS2
Bit 1
CKS1
Bit 0
CKS0 Description
000φ/2 (Initial value)
001φ/8
010φ/32
011φ/128
100φ/256
101φ/1024
110φ/2048
111φ/4096
From the clock source frequency, the resolution, period, and frequency of the PWM output can be
calculated as follows.
Resolution = 1/clock source frequency
PWM period = resolution × 250
PWM frequency = 1/PWM period
If the system clock frequency is 10MHz, then the resolution, period, and frequency of the PWM
output for each clock source are given in table 9.3.