Hardware manual

Rev. 3.0, 09/98, page 153 of 361
7.6 Sample Application
In the example below, the free-running timer is used to generate two square-wave outputs with a
50% duty cycle and arbitrary phase relationship. The programming is as follows:
(1) The CCLRA bit in the TCSR is set to “1.”
(2) Each time a compare-match interrupt occurs, software inverts the corresponding output level
bit in TOCR (OLVLA or OLVLB).
Ø
Internal address bus
Internal write signal
FRC clear signal
FRC
Write cycle: CPU write to lower byte of FRC
T
1 T 2 T 3
H' 0000
N
FRC address
Figure 7.16 Square-Wave Output (Example)