Hardware manual

Rev. 3.0, 09/98, page 4 of 361
1.2 Block Diagram
Figure 1.1 shows a block diagram of the H8/338 Series.
Port 4 Port 7 Port 5
Port 8 Port 3 Port 9
Port 6
CPU
H8/300
Clock
pulse
gener-
ator
RAM
16 -bit free-
running timer
PROM
(or masked ROM)
Serial
communication
(2 channels)
8-bit D/A converter
(8 channels)
8-bit timer
(2 channels)
PWM timer
(2 channels)
P20 /A8
P21 /A9
P22/A10
P23/A11
P24/A12
P25/A13
P26/A14
P27/A15
P70/AN0 P71/AN1 P72/AN2 P73/AN3 P74/AN4 P75/AN5
P76/AN6/DA0 P77 /AN7/DA1
AVCC
AVSS
P60/FTCI
P61/FTOA
P62 /FTIA
P63 /FTIB
P64/FTIC
P65/FTID
P66/FTOB/IRQ6
P67 /IRQ7
P52 /SCK0
P51 /RxD0
P50 /TxD0
P86/SCK1/IRQ5
P85/RxD1/IRQ4
P84/TxD1/IRQ3
P83
P82
P81
P80
P37/D7
P36/D6
P35/D5
P34/D4
P33/D3
P32/D2
P31/D1
P30/D0
P40/TMCI0
P41/TMO0
P42/TMRI0 P43/TMCI1
P44/TMO1
P45/TMRI1
P46/PW0 P47/PW1
P10/A0
Port 1Port 2
P11/A1
P12/A2
P13/A3
P14/A4
P15/A5
P16/A6
P17/A7
RES
MD0 MD1
VCC
STBY NMI
VCC VSS VSS VSS VSS VSS VSS VSS
XTAL EXTAL
P97/WAIT
P96/Ø
P95/AS
P94/WR
P93/RD
P92/IRQ0
P91/IRQ1
0/ADTRG
P9
/IRQ2
*
1
*2
Notes:
Memory Sizes
H8/338
48k bytes
2k bytes
H8/337
32k bytes
1k byte
H8/336
24k bytes
1k byte
ROM
RAM
1. CP-84 and CG-84 only.
2. PROM is available in the H8/338 and H8/337 only.
Data bus (Low)
8-bit D/A converter
(2 channels)
Data (High)
Address bus
Figure 1.1 Block Diagram