Hardware manual
Rev. 3.0, 09/98, page 138 of 361
Bit 3Output Compare Flag A (OCFA): This status flag is set to “1” when the FRC value
matches the OCRA value. This flag must be cleared by software. It is set by hardware, however,
and cannot be set by software.
Bit 3
OCFA Description
0 To clear OCFA, the CPU must read OCFA after it has been set to “1,” (Initial value)
then write a “0” in this bit.
1 This bit is set to 1 when FRC = OCRA.
Bit 2Output Compare Flag B (OCFB): This status flag is set to “1” when the FRC value
matches the OCRB value. This flag must be cleared by software. It is set by hardware, however,
and cannot be set by software.
Bit 2
OCFB Description
0 To clear OCFB, the CPU must read OCFB after it has been set to “1,” (Initial value)
then write a “0” in this bit.
1 This bit is set to 1 when FRC = OCRB.
Bit 1Timer Overflow Flag (OVF): This status flag is set to “1” when the FRC overflows
(changes from H'FFFF to H'0000). This flag must be cleared by software. It is set by hardware,
however, and cannot be set by software.
Bit 1
OVF Description
0 To clear OVF, the CPU must read OVF after it has been set to “1,” (Initial value)
then write a “0” in this bit.
1 This bit is set to 1 when FRC changes from H'FFFF to H'0000.
Bit 0Counter Clear A (CCLRA): This bit selects whether to clear the FRC at compare-match
A (when the FRC and OCRA values match).
Bit 0
CCLRA Description
0 The FRC is not cleared. (Initial value)
1 The FRC is cleared at compare-match A.