Hardware manual

Rev. 3.0, 09/98, page 129 of 361
7.1.3 Input and Output Pins
Table 7.1 lists the input and output pins of the free-running timer module.
Table 7.1 Input and Output Pins of Free-Running Timer Module
Name Abbreviation I/O Function
Counter clock input FTCI Input Input of external free-running counter clock signal
Output compare A FTOA Output Output controlled by comparator A
Output compare B FTOB Output Output controlled by comparator B
Input capture A FTIA Input Trigger for capturing current count into input capture
register A
Input capture B FTIB Input Trigger for capturing current count into input capture
register B
Input capture C FTIC Input Trigger for capturing current count into input capture
register C
Input capture D FTID Input Trigger for capturing current count into input capture
register D
7.1.4 Register Configuration
Table 7.2 lists the registers of the free-running timer module.
Table 7.2 Register Configuration
Name Abbreviation R/W Initial Value Address
Timer interrupt enable register TIER R/W H'01 H'FF90
Timer control/status register TCSR R/(W)
*
1
H'00 H'FF91
Free-running counter (High) FRC (H) R/W H'00 H'FF92
Free-running counter (Low) FRC (L) R/W H'00 H'FF93
Output compare register A/B (High)
*
2
OCRA/B (H) R/W H'FF H'FF94
*
2
Output compare register A/B (Low)
*
2
OCRA/B (L) R/W H'FF H'FF95
*
2
Timer control register TCR R/W H'00 H'FF96
Timer output compare control register TOCR R/W H'E0 H'FF97
Input capture register A (High) ICRA (H) R H'00 H'FF98
Input capture register A (Low) ICRA (L) R H'00 H'FF99
Notes: 1. Software can write a “0” to clear bits 7 to 1, but cannot write a “1” in these bits.
2. OCRA and OCRB share the same addresses. Access is controlled by the OCRS bit in
TOCR.