Hardware manual

Rev. 3.0, 09/98, page 128 of 361
External
clock source
FTOA
FTOB
FTIA
FTIB
FTIC
FTID
Internal
clock sources
Ø/2
Ø/8
Ø/32FTCI
Clock
Overflow
Clear
Compare-
match B
Control
logic
Capture
Clock select CORA (H/L)
TCSR
TIER
Comparator A
FRC (H/L)
Comparator B
Module data bus
Bus interface
OCRB (H/L)
ICRA (H/L)
ICRB (H/L)
ICRC (H/L)
ICRD (H/L)
TCR
TOCR
Internal
data bus
ICIA
ICIB
ICIC
ICID
OCIA
OCIB
FOVI
Interrupt signals
OCRA, B
FRC
ICRA to D
TCSR
TIER
TCR
TOCR
Legend:
Free-Running Counter (16 bits)
Output Compare Register A, B (16 bits)
Input Capture Register A, B, C, D (16 bits)
Timer Control/Status Register (8 bits)
Timer Interrupt Enable Register (8 bits)
Timer Control Register (8 bits)
Timer Output Compare Control
Compare-match A
Figure 7.1 Block Diagram of 16-Bit Free-Running Timer