Rev. 3.0, 09/98, page 123 of 361
P9n
RP9
Reset
Reset
WP9
WP9D
R
R
Q
Q
D
D
P9n DR
P9n DDR
C
C
WP9D:
WP9:
RP9:
n = 1, 2
Write Port 9 DDR
Write Port 9
Read Port 9
IRQ0 input
IRQ1 input
IRQ enable register
IRQ0 enable
IRQ1 enable
Internal data bus
Figure 6.9 (b) Port 9 Schematic Diagram (Pins P9
1
and P9
2
)
