Rev. 3.0, 09/98, page 109 of 361
RP6
Reset
Reset
Internal data bus
WP6
WP6D
R
R
Q
Q
D
D
P66 DR
P66 DDR
C
C
WP6D:
WP6:
RP6:
Write Port 6 DDR
Write Port 6
Read Port 6
Free-running
timer module
Output enable
Output-compare
output
P66
IRQ6 enable register
IRQ6 enable
IRQ6 input
Figure 6.6 (c) Port 6 Schematic Diagram (Pin P6
6
)
