Rev. 3.0, 09/98, page 108 of 361
RP6
Reset
Reset
WP6
WP6D
R
R
Q
Q
D
D
P61 DR
P61 DDR
C
C
WP6D:
WP6:
RP6:
Write Port 6 DDR
Write Port 6
Read Port 6
Free-running
timer module
Output enable
Output-compare
output
Internal data bus
P61
Figure 6.6 (b) Port 6 Schematic Diagram (Pin P6
1
)
