Rev. 3.0, 09/98, page 102 of 361
Figures 6.5 (a) to 6.5 (c) show schematic diagrams of port 5.
RP5
Reset
Reset
Internal data bus
WP5
WP5D
R
R
Q
Q
D
D
P50 DR
P50 DDR
C
C
WP5D:
WP5:
RP5:
Write Port 5 DDR
Write Port 5
Read Port 5
SCI module
Transmit enable
Transmit data
P50
Figure 6.5 (a) Port 5 Schematic Diagram (Pin P5
0
)
