Hardware manual

Rev. 3.0, 09/98, page 95 of 361
Figure 6.3 shows a schematic diagram of port 3.
P3n
Reset
Reset
Reset
WP3
WP3D
WP3P
R
R
R
Q
Q
Q
D
D
D
P3n DR
P3n DDR
P3n PCR
C
C
C
RP3
External address write
Mode 1 or 2
External address
read
WP3P:
WP3D:
WP3:
RP3P :
RP3:
n = 0 to 7
Write Port 3 PCR
Write Port 3 DDR
Write Port 3
Read Port 3 PCR
Read Port 3
Mode 3
Mode 3
RP3P
Mode 3
Internal data bus
Figure 6.3 Port 3 Schematic Diagram