Hardware manual

Rev. 3.0, 09/98, page 93 of 361
P3DR is an 8-bit register containing the data for pins P3
7
to P3
0
. When the CPU reads P3DR, for
output pins it reads the value in the P3DR latch, but for input pins, it obtains the logic level
directly from the pin, bypassing the P3DR latch.
Port 3 Input Pull-Up Control Register (P3PCR)H'FFAE
Bit:76543210
P3
7
PCR P3
6
PCR P3
5
PCR P3
4
PCR P3
3
PCR P3
2
PCR P3
1
PCR P3
0
PCR
Initial value:00000000
Read/Write: R/W R/W R/W R/W R/W R/W R/W R/W
P3PCR is an 8-bit readable/writable register that controls the input pull-up transistors in port 3. If
a bit in P3DDR is cleared to “0” (designating input) and the corresponding bit in P3PCR is set to
“1,” the input pull-up transistor for that bit is turned on.
Modes 1 and 2: In the expanded modes, port 3 is automatically used as the data bus. The values
in P3DDR, P3DR, and P3PCR are ignored.
Mode 3: In the single-chip mode, port 3 can be used as a general-purpose input/output port.
Reset and Hardware Standby Mode: A reset or entry to the hardware standby mode clears
P3DDR, P3DR, and P3PCR to all “0.” All pins are placed in the high-impedance state with the
pull-up transistors off.
Software Standby Mode: In the software standby mode, P3DDR, P3DR, and P3PCR remain in
their previous state. In modes 1 and 2, all pins are placed in the data input (high-impedance) state.
In mode 3, all pins remain in their previous input or output state.
Input Pull-Up Transistors: Port 3 has built-in programmable input pull-up transistors that are
available in mode 3. The pull-up for each bit can be turned on and off individually. To turn on an
input pull-up in mode 3, set the corresponding P3PCR bit to “1” and clear the corresponding
P3DDR bit to “0.” P3PCR is cleared to H'00 by a reset and in the hardware standby mode, turning
all input pull-ups off. In software standby mode, the previous state is maintained.